Field effect transistors (FETs) have been used in conventional integrated circuit (IC) design. Due to shrinking technology nodes, high-k dielectric material and metal are often considered to form a gate stack for a FET. Integration issues exist when forming various metal-gate FETs onto a single IC chip, especially when resistors are integrated in an IC circuit. One issue is related with dishing effect during a polishing process. In another example, a gate replacement process includes an etch process to remove the polysilicon gate. However, the formed polysilicon resistors can be damaged and recessed by the etch process, causing the deviation of the resistance of the polysilicon resistor from the designed target. Therefore, a structure integrated with high k metal gate a method making the same are needed to address the above issues.